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this auction"The Pittsburgh Modular Timetable is essentially a pair of clock dividers that share a common clock and reset.
The divider produces quarter, half, whole & double whole-note divisions of the input signal. The patterns generated in the 2nd section range from the simple (or mundane, even an exact replica of the divider outputs) to the convoluted, depending on several factors – some adjustable in real time, some not.
Even in its basic configuration the Timetable is ‘bent by design’ it takes advantage of what could (should?) be considered errors to provide variations and unpredictable (but not random or chaotic) changes… all tied to a clock. The user can also take the ‘bends’ further by swapping out one, or both, of the CMOS logic chips in the core of the circuit. Changing the logic chip changes the functionality of the Timetable creating a new set of behaviors to explore.
The primary intention of Timetable is to provide timed events, both predictable & inconsistent… a little like the average public transport system.
In practice, you can use the module to provide a set of straightforward divisions or as a whacked out gate spewing lunatic… and of course something, somewhere in the middle. It loves feedback. Sending one of the many outputs back into its CV or Digital control inputs will make it jerk and twist. A Binary system that sometimes gets stuck somewhere between 1 and 0.
Here is some
audio of the Timetable in action. A basic oscillator and filter are used with the Timetable in this demo. The pitch of the oscillator, frequency of the filter, and the divider within the Timetable are all CV’d from different voltages available on the Timetable.
A Mod Pack is available separately so it will be easy to try different combinations of logic. It comes with 2 sets of 4 different logic chips, a logic pattern table for each chip, an IC Remover to make swapping out chips a breeze, a sticker, a fancy cardboard box with anti-static foam to keep everything safe, and a secret prize. The mod pack will be $15 USD. The logic chips included in the Mod Pack are NOR, NAND, XOR, XNOR.
Divider 1:
Divider 1 (outputs 1/2/3/4) produces fixed /2, /4, /8, /16 clock divisions. These outputs are not effected by any of the CV or external controls, it is the straight guy.
Divider 2:
Divider 2 (outputs A/B/C/D) starts from the same point as Divider 1 but the counter can be manipulated in a number of ways…
Mode:
Divider 2 can be advanced by either the main clock, or the last stage of Divider 1. With no CV and the Invert control fully counter-clockwise this just extends the count for longer divisions. The Mode can be controlled by external gates.
Flip:
Decides if the 2nd counter is advanced on the positive or negative going edge of the clock. At its most basic this offsets Divider 2 by a clock pulse. It is the same divisions as Divider 1 but on the next beat. The Flip can be controlled by external gates.
Invert and CV Input:
The invert control is nominally fully counter-clockwise. At clockwise, each stage of the 2nd divider is inverted, but, its not just the outputs that get inverted, as each stage feeds the next to create the divisions the whole count is effected. The easiest way to explain it is it’s like offsetting the count backwards; where Flip moves the divisions one beat forward, with Invert clockwise the divisions are shifted one beat back. The CV amount control is attenuverting so you can add or subtract voltages from the Invert value.
Gate Inputs:
All the gate inputs have a threshold of ~1V.
Gate Outputs:
The gate outputs (1/2/3/4 and A/B/C/D) follow the pulsewidth of the clock. With some feedback patches its possible to get triggers from A/B/C/D with “gate” inputs.
CV1 – 3 Outputs:
These are voltages derived from Divider 2. CV1 is stepped, bipolar and CV3 is stepped, unipolar. CV2 is the smoothed difference between CV1 and CV2. In use CV1 and CV2 are usefull for things like filter sweeps etc… CV3 is great for pinging filters and Low Pass Gates. All 3 CV outputs are great for controlling VCOs.
Usage Notes:
1. Using a fast LFO into the CV Input, you can get bursts of events that only occur when the clock is high.
2. Both sets of divided outputs (1/2/3/4 and A/B/C/D) are generated the same way, by first ANDing the clock with the output of a binary counter. A/B/C/D has the voltage controlled logic applied to the binary outputs before the AND.
3. One cool patch is to control Flip with output 3 or 4. This starts both dividers from the same point but as they advance they get offset, then eventually after a fairly long cycle, they come back into alignment. SImilar to the effect of singing in the round ,but for the chorus everyone sings at the same time.
4. Another interesting patch is with the Mode switch up and the Invert pot fully clockwise. The A/B/C/D outs will now follow the clock, but for every 16 clock pulses a differant set of outs will be active. If the outputs where clocking sequencers you have a kind of “dueling banjos” set-up.
The Timetable was designed by Thomas O’Connor. His designs are a unique combination of utility and chaos and the Timetable is no different."
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