MATRIXSYNTH: Cyndustries Logicpac Modcan A format synth module


Tuesday, August 03, 2010

Cyndustries Logicpac Modcan A format synth module


via this auction
"The Logipac module consists of a pair of 3-input, triple-function Boolean Gate sections, and a pair of D-type Flip-Flop sections. All inputs feature our anything-to-logic input circuitry which allows slow-moving waveforms (like sine waves) to behave like logic signals. The only requirement is that they cross +1V somewhere in their cycle.

Logic Gates
The Boolean Gate sections feature 3-inputs rather than the usual 2, which greatly increases their versatility and allows for the patching of more complicated logical functions with fewer modules. The 3-inputs are processed by logical AND, OR, and EXCLUSIVE OR (EXOR) functions simultaneously, and each function has it's own output jack and corresponding LED.

(To use the gates as 2-input functions, just use 2 inputs of the OR and EXOR with input 3 left unused. The AND requires the unused input be patched together with one of the used inputs.)

The 3-input EXOR functions as an odd / even parity generator. If an odd number of inputs are high, the output is high, and if an even number of inputs are high, the output is low. You can cascade this operation into the other EXOR gate and pick up 2 more inputs. You can also use the EXOR function as a logic inverter. Patch one input high and patch the signal to be inverted into another input. Check out the truth (table that is):

Flip-Flops
The D-type Flip-Flops are 1-bit memory storage devices with various ways to acquire the bit and turn it on and off. Applications are best understood by understanding what signals are coming and going.

[Q] and [NOTQ] Q-bar (pronounced Not Q or Q Bar)
These are the outputs. Q is the bit, either on or off and NOTQ is its logical inverse (when Q is on, NOTQ is off and vice-versa).

[S] SET
A high level at this input will latch Q high (NOTQ low)

[R] RESET
A high level at this input will latch Q low (NOTQ high)

Bringing both SET and RESET high simultaneously is undefined and will produce unpredictable results. It's like trying to force a see-saw to be both ways at once. When SET and RESET are brought low again, the one to fall last will be remembered.

[C] CLOCK and [D] DATA
The CLOCK and DATA inputs work together. The CLOCK is edge sensitive and when brought high, the state of the DATA input is latched into Q. That is, Q will equal DATA when CLOCKed.

There, that's not so complicated, is it?
some logic applications -

http://www.cyndustries.com/modules_logipac_app.cfm"

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